MSP, a Division of TSI, specializes in providing high-quality contamination standards for the semiconductor industry. Our services are designed to enhance the performance of your semiconductor manufacturing inspection systems, reduce inconsistencies within your inspection and metrology tools, and maximize device yield.
We supply certified contamination standards for both wafer and reticle inspection tools, ensuring consistent and repeatable control of particle size and count. Our contamination standards involve depositing specified particles of size, composition, and count onto your substrate of choice, including wafers, 6-inch reticles, and other substrates. We can deposit particles on bare, film, and patterned wafers ranging from 100mm to 300mm, supporting your development, qualification, calibration, and monitoring needs effectively.
Products
SPx Calibration Standards
Dev-Dep Development Wafer Contamination Standards
Dev-Dep Development Reticle Contamination Standards
Contamination control sits at the heart of semiconductor yield and reliability. For R&D teams building and validating inspection methods, wafer and reticle contamination standards provide consistent, traceable artifacts that help quantify tool sensitivity, compare cleaning processes, and support method development. By introducing known, well-characterized features, researchers can create controlled scenarios that highlight instrument performance and process behavior.
Why reference standards matter in R&D:
Use cases across the development cycle:
Integration with cleanroom research:
TSI supports semiconductor R&D with selection guidance, documentation, and service that align with cleanroom protocols. Work with our specialists to choose standards that match your inspection wavelengths, magnification ranges, and measurement objectives. With the right references in place, your team can move faster from hypothesis to validated methods, advancing process control and tooling decisions with high-confidence data.